Improvements in the operation speed of central processing units (CPUs) with semiconductor microfabrication have been made on the basis of Moore's law. However, Moore's law is coming to an end. A reason for this is a limit of microfabrication. Ten nanometer is said to be the limit. The present semiconductor manufacturing technology is approaching the limit, and increases in speed of data processing due to CPU improvements have been slowed.
A CPU performs arithmetic processing on data retained within a register. The CPU prefetches data as an object of operation from a cache into the register. When data within the cache is not target data, the CPU determines that a “cache miss” has occurred, and performs processing of reading the data from a main memory.
In cases of data centers or the like where a large amount of data processing is necessary, in particular, a time of access to the main memory increases more than that of arithmetic processing. This represents a bottleneck in data processing, and invites delays. In addition, power consumption in data transfer is increased due to needs for increases in speed, and servers need to be cooled. Power reduction in data centers has therefore become a challenge. Incidentally, such a CPU architecture is shown in FIG. 1 of PTL 1, for example.